Electrical resistance memory



Jan. 27, 1970 F. LEE 3,492,659

ELECTRICAL RESISTANCE MEMORY Filed Oct. 5, 1966 I0 F|G-| 20 I6 |2 I2 l2MZI I8 -18 l8 T M 2 I;

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- REFERENCE 40 LEVEL 38 32 l0 SELECTION VOL cmcun SE United StatesPatent 3,492,659 ELECTRICAL RESISTANCE MEMORY Fred Lee, 888 Mary Ave.,Sunnyvale, Calif. 94087 Filed Oct. 5, 1966, Ser. No. 584,533 Int. Cl.Gllb 9/00 U.S. Cl. 340-173 7 Claims ABSTRACT OF THE DISCLOSURE Anelectronic memory formed from a plurality of electrical resistanceelements connected in an array to permit successive elements to beindividually pulsed with a relatively small electrical current,following which a predetermined operative characteristic of each elementis sensed to determine whether or not the element is to be pulsed with arelatively large electrical current. The elements forming the array canbe incandescent lamps whose heat radiation, light or resistance can besensed to provide an indication of the status of the operatingcharacteristic of the lamp.

This invention relates to an electronic memory and, more particularly,to a memory having a number of electrical resistance elements providingmemory cells.

The present invention resides in a memory comprised basically of amatrix or an array of electrical resistance elements and a method ofmaintaining the memory in an operating condition. Each element has anoperative characteristic or condition which changes when electricalcurrent flows therethrough and whose operative condition persists for afinite time after the current has ceased. The array comprises a seriesof rows and a number of columns of these elements so that electricalswitches can be placed in series with respective rows and columns. Withthis construction, the elements can be successively and individuallyactuated and only a single element at any one time can be connected toan external circuit. In this way, each element can be connected to meansfor sensing its operative condition and thereafter connected to a powersource if the condition is found to exist. The entire array cantherefore be periodically scanned and current pulses can be sent tothose elements whose operative conditions exist. Thus, the operativecondition of each element provides its memory.

Any operative condition of the elements can be used as a memory so longas it is affected by current flow through the element. Electricalresistance, heat and light are characteristics that can be sensed andcan persist for a relatively long time after current flow through acircuit element has ceased. The persistence times of thesecharacteristics can be considered long if the rate at which the array isscanned is high. A high scanning rate can be assured by the use of ahigh frequency scanning signal.

To illustrate the concepts of this invention, the particular circuitelements will be disclosed as incandescent lamps whose electricalresistance values increase with an increase in temperature. Thus, theparticular operative condition to be sensed will be the increasedresistance of the lamp and this can be determined by measuring thevoltage drop across the same. The temperature increase in the lamp isbrought about by the heat generated due to current flow and, since theheat dissipation from the lamp is relatively slow, the heat retained bythe lamp will provide the actual memory therefor.

The purpose of scanning the array is twofold. Firstly, the voltage dropacross the lamp is sensed to determine if its resistance value is high,i.e., if the lamp is on, and secondly to direct a current pulse throughthe lamp if the same is found to be on. In this way, the lamps can bemaintained in an ON condition and this characteristic will establish thememory of the lamp. The scanning rate can be high enough to prevent thecooling of the lamps so that the ON lamps will remain on and the OFFlamps will remain off notwithstanding the periodic nature of thescanning signal.

When used in the foregoing manner, the lamp array requires no othermemory. It is possible to use each lamp as a temporary memory cellbecause it remains hot for a finite time after its exciting current isinterrupted and because the resistance of the lamp is much greater thanwhen it is cold.

The method of maintaining the memory comprises the testing of a numberof lamps in a recurring sequence by measuring their resistance todetermine which are hot and then pulsing these lamps with an electricalcurrent to keep them hot. When a hot lamp is found, a suflicient amountof current is allowed to pass through it to keep it hot before thesucceeding lamp is tested. Thus, once a lamp is hot, it remains hot eventhough the current is maintained at a minimum level so that cold lampsare not heated by it.

Rather than sensing the resistance level of the lamps, the heat or lightradiated from each lamp can be sensed to give a measure of the ON or OFFcondition of the lamp. Specific sensors adjacent to the lamp arerequired to accomplish these ends.

The resent invention is constructed to allow a lamp, once it is turnedon, to remain On with no storage or other memory system required. Thelamp itself is its own memory, i.e., it remembers the fact that it haspreviously been turned on.

For the array of lamps each lamp does not require its own driver. Thenumber of lamp drivers is limited to the number of rows and columns ofthe lamp array.

By sequentially testing the lamps in order, it is possible to provide acontinuously recurring readout of the ON- OFF states of all of thelamps. In this way, a relatively large number of lamps can be used toform the array so that the resulting memory has a broad range ofapplications.

The memory of the present invention is simple in construction and can becombined with simple logic circuitry so that the lamp on either side ofan ON lamp can be turned on and the last mentioned lamp then beextinguished. Thus, the display can be utilized as a forward or reversecounter. Carries or borrows can be caused to move from one row of thearray to another row, thus allowing the various rows to represent digitsof a decimal counter.

The primary object is thus to provide an electronic memory comprised ofan array of electrical resistance elements connected in a manner topermit successive elements to be individually sensed for a particularoperative condition and thereafter pulsed if the condition is found toexist so that the elements themselves can provide their own memory toavoid the necessity of a memory independent of the array.

Another object of this invention is to provide an electronic memoryhaving an array of incandescent lamps whose heat radiation, light orresistance can be tested to provide an indication of its ON-OFF statusso that the array can define a memory adapted for use in a variety ofapplications that require no other memory.

Still another object of the invention is to provide an electronic memoryof the type described which can be combined with simple logic circuitryto form a counter for use in counting the relatively high figures.

A further object of this invention is to provide a method of maintainingthe array of the type described in an operating condition byperiodically testing each element for a particular operating conditionand then by directing 3 an electrical current through the elementimmediately to keep the element operating in the particular conditionnotwithstanding the periodic nature of the scanning and pulsing steps ofthe method.

Other objects of this invention will become apparent as thespecification progresses, reference being had to the accompanyingdrawing wherein:

FIG. 1 is a schematic view of the invention showing the array ofresistive elements coupled to actuatable switches;

FIG. 2 is a schematic view of the invention with the matrix coupled tothe sensor; and

BIG. 3 is a view similar to FIG. 2 but illustrating the use of theapparatus as a counter.

The electronic memory of the present invention includes a matrix orarray of electrical resistance elements 12 arranged in rows and columnsin the manner shown in FIG. 1. For purposes of illustration, eachelement 12 will comprise an incandescent lamp whose resistance increaseswith temperature and a respective semiconductive device 14 in serieswith the lamp to prevent current fiow in one direction.

Each lamp 12 is connected at one of its ends to a lead 16 and eachdevice 14 is connected at one of its ends to a lead 18. Leads 16 and 18therefore represent the rows and columns of the array.

Matrix 10 is therefore a memory system which can be used in a number ofdifferent ways with various types of external circuits. To be used as amemory, the method of the invention is carried out wherein each lamp isfirst tested to determine if it is on, i.e., if its electricalresistance is high, and then subjected to a current pulse if it is foundto be on. Lamps 12 are successively tested by a scanning signal and,each time an ON lamp is found, it will be pulsed before the next lamp istested. The scanning of array 10 is periodic so that ON lamps willremain on and OFF lamps will remain off so long as the memory system isoperating.

Each lead has a switch 20 in series therewith, common terminals ofswitches 20 being connected by a lead 21 to a parallel network 22including a resistor 24 and an ON-OFF power switch 26. Each lead 18 hasa switch 28 in series therewith and switches 28 are shown as beingconnected to ground potential to indicate their relationship to terminaladjacent to network 22 when the latter is coupled to a voltage source.

The basic operation of assembly of FIG. 1 includes coupling terminal 30to a voltage source while switches 20, 26 and 28 are open. Hereafter,switches 20 and 28 are sequenced, i.e., switches 20 are successivelyactuated when one of switches 28 is closed, switches 20 are succesivelyactuated when a second switch 28 is closed and so on. The resistancevalue of resistor 24 is maintained high enough to prevent substantialcurrent flow through lamps 12. Thus, the small current flow throughresistor 24 will not energize any of the lamps as switches 20 and 28 aresequenced.

As switches 20 and 28 are sequenced, lamps 12 are successively andindividually placed in series with network 22. Thus, at any one timeonly a single lamp is in the circuit since only one switch 20 and oneswitch 28 will be closed for each operating time interval.

Switch 26 is to be closed when a lamp 12 is found to have been on andbefore the succeeding lamp is placed in the circuit. The ON lamp thuswill receive a current pulse which will keep it in the ON state. Thevoltage drop across the lamp-device unit will be determined to give ameasure of the resistance of the lamp and if this drop is relativelyhigh which it will be if the lamp has been on switch 26 will be closedto pulse the lamp. In this way, an ON lamp will be remain on and an OFFlamp will remain off. The lamp itself will be its own memory cellbecause the heat generated by current flow through the lamp will persistfor a finite time and the scanning rate can be made much smaller thanthe time required to allow the lamp to cool.

The apparatus for carrying out the aforesaid steps is shown in FIG. 2wherein matrix 10 is shown in combination with a switch selectioncircuit 32 and a voltage sensing circuit 34. Terminal 30 and matrix 10are connected to a voltage source. Resistor 24 and switch 26, in theform of a transistor, are shown coupled between one side of the voltagesource and matrix 10. The input of voltage sensor 34 is coupled by leads36 and 37 across matrix 10 and the output of sensor 34 is connected bylead 38 to switch 26. Selection circuit 32 provides that only a singlelamp 12 is in the circuit at any one time. To this end, it includesswitches 20 and 28 of FIG. 1.

If the voltage across matrix 10 is above a predetermined minimum, theoutput of sensor 34 actuates switch 26 and causes a current flow inbypassing relationship to bypass resistor 24. The current will flowthrough the lamp in the circuit only for a relatively short time sinceselection circuit 32 will interrupt the flow and connect the next lampinto the circuit.

If a lamp is hot, the voltage drop is higher than if the lamp is cold.The voltage sensing action is accomplished for each lamp until all lampsof matrix 10 have been tested. Then the entire operation is repeated solong as the system is in operation. Thus, only ON lamps are pulledpulsed and these remain on while OFF lamps remain off.

The lamps can be turned on in any one of a number of ways. For instance,they can be turned on manually by placing a potential across each ofthem. The lamps also can be turned on from a serial input using othermemory by switching to a mode of operation where power switch 26 iscontrolled by a serial input rather than by sensor 34.

A single circuit such as shown in FIGS. 1 and 2 can accommodate up tolamps if any combination of lamps can be on. Also, more than one ofthese 100 lamp systems could share one set of lamp drivers, i.e., asingle selection circuit 32.

The testing and pulsing of the lamps can be done at an accelerated paceand the pace can be slowed down only when a hot lamp is found. Forinstance, if groups of 10 lamps represent the various numbers of adecimal digit, only one of which is on at any time, only 10% of all thelamps are on at once. A scanning rate of one microsecond for each lampcan be used and this time interval is sufficient to test each lamp todetermine if it is hot or cold. When a hot lamp is found, switch 26 isactuated and the scanning can be inhibited for one millisecond. Usingthis sequencing action array 10 could handle 1000 lamps (100 decimaldigits). To scan the entire matrix would take .1 second and this isclearly insufficient time for a hot lamp to cool between pulses. In thisway, each hot lamp would be pulsed at the rate of about one microsecondevery .1 second which is the required 1% of the time. If the scanningrate of cold lamps is increased with respect to the duration of thecurrent pulse applied to a hot lamp without increasing the number oflamps in the array greater lamp brightness can be had with smallercurrent pulse.

With logic circuitry coupled to an assembly of FIG. 2, the circuit canbe made to turn on a lamp adjacent to one that has previously been on.Thus, the array can be pulsed and the light moved from one lamp toanother in either direction. The assembly of FIG. 3 illustrates thisconcept wherein logic circuitry 42 is coupled in lead 38 to control theactuation of switch 26 in response to the output of sensor 34. It canalso be arranged that after the tenth lamp in each group of 10, thefirst lamp is turned on again and a carry is propagated to the nextgroup of 10 lamps. The circuit can thus be made to define a decimalcounter capable of counting in either direction.

One of two things can be done to the method of scanning array 10 tosimplify the logic required if the assembly is used as a bi-directionalcounter. The direction of counting can be reversed by reversing thedirection of a part of the scan mechanism so that lamps of each digitare selected in reverse order.

Alternatively, a method of scanning can be used which selects each lamptwice. The selection for such a system, with respect to the lamppositions in a group of ten lamps, might be as follows: 2, 1, 3, 2, 4,3, 5, 4, 6, 5, 7, 6, 8, 7, 9, 8, 0, 9, 0. Such a scheme allows the logicto base its decision as to which lamp to pulse on the observation of twoadjacent lamps and allows the pulsing of either lamp since the firstlamp of any pair to be selected is again selected two time intervalslater. With such a scheme, the logic could add or subtract withoutchanging the scanning.

Array can be considered a complete memory with a visual and/ orelectrical output or as a display unit with an inherent memory. Withassociated logic, its uses can include simple displays of all types,totalizing numerical displays, and bi-directional totalizing displays.One application which takes advantage of both its memory and displayfunctions is as a register in a calculating machine.

While one embodiment of this invention has been shown and described, itwill be apparent that other adaptations and modifications can be madewithout departing from the true spirit and scope of the invention.

What is claimed is:

1. An electronic memory assembly comprising: a plurality of electricalresistance elements disposed in a predetermined matrix to form a seriesof rows and a number of columns, each element having a pair of opposedends with one of its ends being coupled to the corresponding ends of theelements in a respective row and its opposite end being coupled to thecorrespondingly opposite ends of the elements in a respective column,each element having an operative characteristic capable of being changedin response to current flow therethrough; a voltage sensing unit forsensing the voltage drop across an element; a power switch coupled toand actuated by said sensing unit when said voltage drop is at least apredetermined value, said power switch adapted to be connected to avoltage source; and sequentially actuated switching structure forsuccessively connecting said elements individually to said sensing unitand said power switch, whereby an electrical current will be caused toflow through the elements whose voltage drop is equal to at least saidpredetermined value and when said power switch is connected to saidvoltage source.

2. An electronic memory assembly comprising: a plurality of electricalresistance elements disposed in a predetermined matrix to form a seriesof rows and a number of columns, each element having a pair of opposedends with one of its ends being coupled to the corresponding ends of theelements in a respective row and its opposite end being coupled to thecorrespondingly opposite ends of the elements in a respective column,each element having an operative characteristic capable of being changedin response to current flow therethrough; a voltage sensing unit forsensing the voltage drop across an element; a power switch adapted to becoupled to a voltage source; means coupled to said power switch forcontrolling the actuation of the same in response to the output of saidsensing unit and in accordance with a predetermined sequence; andsequentially actuated switching structure for connecting said elementsindividually to said sensing unit, whereby the operative characteristicsof said elements can be sensed and the power switch actuated accordingto said sequence.

3. An electronic memory as set forth in claim 2, where in said controlmeans includes a counter unit.

4. An electronic memory assembly comprising: a plurality of electricalresistance elements disposed in a predetermined matrix to form a seriesof rows and a number of columns, each element having a pair of opposedends with one of its ends being coupled to the corresponding ends of theelements in a respective row and its opposite end being coupled to thecorrespondingly opposite ends of the elements in a respective column,each element having an operative characteristic capable of being changedin response to current fiow therethrough; means coupled with eachelement for sensing the changed operative characteristics thereof; apower switch coupled to and actuated by said sensing means when saidchanged characteristic is sensed, said power switch adapted to beconnected to a voltage source; and sequentially actuated switchingstructure for successively connecting said elements individually to saidsensing means and said power switch, whereby an electrical current willbe caused to flow through the elements having said changedcharacteristic and when said power switch is connected to said voltagesource.

5. A method of operating an array of incandescent lamps, each having anoperative characteristic capable of being changed in response to theflow of electrical current therethrough comprising the steps of: causinga relatively small current to flow successively through said elementsand measuring the voltage drop across each element, whereby to sense theoperative characteristics of successive elements to determine if thecharacteristic of each element has changed; and directing an electricalcurrent through each element having a changed characteristic before thecharacteristic of the succeeding element is sensed.

6. A method as set forth in claim 5, wherein is included the step ofcontrolling the flow of electrical current through each lamp having achanged characteristic in accordance with a predetermined sequence.

7. A method as set forth in claim 6, wherein said controlling stepincludes causing said electrical current to flow through the lamps inaccordance with a counting operation.

References Cited UNITED STATES PATENTS 2,958,848 11/1960 Garwin 340-17313,042,823 7/1962 Willard 340l73 X 3,089,126 5/1963 Miller 340-1733,146,426 8/1964 Agon et al 340-474 3,199,087 8/1965 Foglia 340--173.1 X3,357,010 12/1967 Sweeney 340 -324 3,379,831 4/1968 Hashirnoto 340166- XOTHER REFERENCES I. A. Lake, Jr. Array Charging Techniques, IBM TDB, v.8, No. 4, September 1965.

BERNARD KONICK, Primary Examiner JOSEPH F. BREIMAYER, Assistant ExaminerUS. Cl. X.R.

